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Altera NiosII Processor Model Delivered By Imperas
 
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Altera NiosII Processor Model Delivered By Imperas  
 
   
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Wednesday, November 27, 2013 Imperas Software Ltd. (www.imperas.com), founder of the Open Virtual Platforms™ (OVP™) consortium, today announced the availability of the Altera Nios II embedded processor OVP model. Jointly developed by Imperas and Altera, this open source model will enable a high-performance development environment for Nios II embedded software.






The OVP Fast Processor Model of the Nios II may be configured at start-up to match the intended behavior of the actual FPGA component, but will execute significantly faster than real-time. This allows embedded software to be tested more rigorously and earlier in the design process, accelerating complex software development cycles.

“Imperas led formation of the Open Virtual Platforms consortium to improve the embedded software development experience,” said Simon Davidmann, CEO of Imperas. “With Altera, we have taken an important step today by providing designers with a high-performance model of the Altera Nios II processor, executing many times faster than other development offerings to enable the most comprehensive software verification solution available.”

The model and underlying simulator includes a comprehensive application program interface (API) that extends visibility into the processor behavior. This allows the designer to run embedded software, either from Altera or their own code, and leverage advanced analysis and debug operations, including operating system awareness.

“Engineers are seeking rapid development methods that also provide immediate feedback on configuration or customization," said Premal Buch, vice president, Software Engineering, Altera. “The Altera Nios II device has been the most widely used FPGA-based processor for many years, and this OVP model will help customers expand their design options.”

The complexity of system modeling in multi-core and multi-processor environments is driving the need for advanced virtual platform development and verification environments. Verification technologies that operate at a range of abstractions, including CPU- and OS-Aware levels, and that can provide customizable operations that work intimately with the design, are required. The performance of these systems will become more critical as the volume of tests required increase.

The new model of Altera’s Nios II processor will be showcased in the Imperas booth, number 520, at ARM TechCon, October 29–31, 2013.

Availability

The Altera Nios-II OVP processor model is available now, and may be downloaded from the OVP website: www.OVPworld.org/Nios_II.



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