Monday, June 25, 2012: PISCATAWAY, USA: The Nexus 5001 Forum announced the ratification of IEEE-ISTO 5001-2012 Standard (Nexus 5001) for a Global Embedded Processor Debug Interface.


Developed by the Nexus Forum, an industry group of IC companies, systems manufacturers and design automation companies, the revised standard adds support for two new interfaces, IEEE Std. 1149.7 (JTAG) and the Nexus trace over a high-speed Xilinx Aurora SerDes (Serializers/Deserializers) interface, delivering an array of benefits such as shortened time-to-market, for designers.

"We are very pleased to see the completion of this new standard release, which extends Nexus 5001’s value in system-on-chip (SoC) design. It provides the security and support of a proven standards-based debug framework with the flexibility to address a wide range of instrumentation solutions," said Neal Stollon, chairman, Nexus 5001 Forum. "The new Nexus 5001-2012 standard release adds a range of powerful features including new transactions and interfaces that address the major challenges in the debug world, better support for more complex multi-core debug environments and higher performance trace interfaces to allow higher off-chip data throughput for more comprehensive in-silicon analysis."

Many challenges in on-chip debug are directly related to pin I/O resources. For pin-limited designs, reduced debug I/O is often important. For multi-core, SoC designs, increasing the amount of debug throughput, without increasing I/O pins is important for effective and successful analysis and calibration.

"As embedded electronic systems have become more demanding, chip designers are turning to multi-core, SoC solutions that significantly raise gate count and chip complexity. This also requires more complex verification and validation of both the microcontroller and the software running on the MCU. The high-speed Nexus trace port over Aurora allows more data to be transmitted to handle the large amounts of trace data that can be generated by multi-core SoCs," said Randy Dees, 32-bit automotive MCU applications engineer, Freescale Semiconductor, and chairman, Hardware Technical Committee, Nexus 5001 Forum. "Nexus 5001-2012 offers a robust solution for the highly demanding data requirements for instrumentation and measurement of the customer system."

Understanding component and subsystems operations in a variety of environments over time is critically important for system qualification, calibration, upgrading, and safety-critical design in design domains such as automotive, military-aerospace, communications, and medical applications that demand high-quality debug solutions.

"GM Powertrain has utilized a Nexus-based debug interface for the past three generations of development controllers, which spans more than a decade of engine, transmission, and hybrid ECUs. Adhering to the Nexus 5001 standard is important to GM because it has provided a powerful, common interface across multiple generations of development controllers, which has enabled the ability to re-use software development tools," said Norm D'Amico, staff engineer, Controls Engineering Tools Group, GM Powertrain, and GM representative, Nexus 5001 Forum. "Re-use of course, is a big factor in keeping costs down, and this would not be possible without following a robust standard like Nexus 5001."

Addressing the increasing needs in trace and calibration throughput for multi-core, SoC designs, the Nexus Specification also adds support for the Nexus Protocol over Aurora. Aurora is a high-performance, serial data link layer protocol proven over a decade of successful use by industry leading companies. It is a low-latency, resource-efficient, open protocol developed by Xilinx that provides a transparent lower-level interface to the physical serial links transferring Nexus packets. Aurora enables access to the device’s transceiver capabilities and also lowers BOM cost through pin- and trace-count reduction.

"Xilinx developed Aurora to save developers the time and resources that they would otherwise need to spend if they were to develop and test their own multi-gigabit transceiver protocols. Since Aurora is a scalable, open standard that can be used in any silicon device, it has become a de-facto point-to-point, high-speed serial interconnect standard serving multiple market segments," said Tim Vanevenhoven, director of marketing, IP Design Methodology, Xilinx. "Its use for high-performance trace operations as part of the IEEE-ISTO 5001-2012 release is yet another domain where Aurora provides best-in-class features and capabilities in performance-critical applications."

Nexus interfaces also continue to support parallel auxiliary (AUX) buses that are widely used for trace in existing Nexus designs.

To support more effective JTAG-based operations, the Nexus standard has integrated IEEE Std. 1149.7, a next-generation extension of JTAG that defines parallel JTAG TAPS and 2-pin JTAG interfaces, as well as 1149.1 JTAG. IEEE Std. 1149.7 was added because it offers features and options to support complex digital debug issues, including power management, and multiple-core CPUs.

The Nexus 5001-2012 standard is fully available to all Nexus 5001 Forum members and their affiliates.